It is necessary to provide some means by which an operating system can control when interrupts occur. On the WC34020, one can independently control whether each of the devices attached to the machine requests an interrupt when a completion occurs by setting appropriate bits in the device status registers. In addition, the system can control when interrupts will occur by associating a priority with the currently running program.
The details of how interrupts from individual devices are enable/disabled and how the priority scheme works are discussed below. The key point here is that the priority mechanism allows the processor to delay the processing of an interrupt. As a result, one should not think of the devices immediately interrupting the CPU when a completion occurs. Instead, when a completion occurs, devices may request an interrupt. This request remains pending until the priority value associated with the processor is such that the request is granted and an interrupt actually occurs. As discussed below, pending requests may be withdrawn in certain circumstances. Unless the request is withdrawn, each request produces exactly one interrupt.