The 34000 Architecture Language Specification -- Instruction Formats

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Instruction Formats

The operation fields of all WC34000 instructions are encoded using one of the four formats described below.

Two Operand Format

The operation field of all two operand instructions except LINK are encoded as shown in the following diagram:

Only 12 of the 16 possible bit patterns that could appear in the 4-bit OP-CODE component of such an instruction are used for two operand instructions. The remaining bit patterns are reserved for use as prefixes for the opcodes of instructions using other encoding formats. The two operand fields are used to hold effective address specifications. Operand 1 is used as the destination operand and operand 2 is used as the source.

Single Operand Format

All single operand instructions are encoded using the format shown below:

The operand field is interpreted as an effective address specification. Branches are included as members of this group of instructions. Thus, on the WC34000, the target of a branch is generally specified by explicitly using the "Program Counter Indirect with Displacement" addressing mode.

Zero Operand Format

Zero operand instructions are encoded using an 8-bit op-code followed by 8 bits whose values are ignored by the processor.

The LINK Instruction Format

The LINK instruction is the exception to the rule that all WC34000 instructions use a uniform encoding scheme. A special format is used for this instruction. It is shown below.

The `REG' field specifies the address register whose value is to be saved and then modified. The `OPERAND' field uses an effective address specification to indicate the value by which the SP register should be incremented when the instruction is executed.